A computer engineer and creative
I'm Loren Ashfield, a Computer Engineering student at UC Santa Barbara with a passion for design, optimization, and imaginative problem solving.
About Me
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Projects
32KB SRAM Chip Design
A full 32KB SRAM block designed in Cadence Virtuoso, from bitcell layout through sense amplifiers, decoders, and control logic — verified against DRC and LVS.
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AeroVironment Capstone
A high-speed carrier board designed in KiCAD that interfaces a flight controller with cost-effective Raspberry Pis as a companion computer for an autonomous drone.
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5Gbps USB-C Splitter
A compact USB-C 5Gbps splitter PCB with integrated power delivery and careful differential-pair routing to preserve signal integrity at high speed.
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